{"version":1,"kind":"Article","sha256":"","slug":"172","location":"","dependencies":[],"doi":"10.54294/ar5oss","frontmatter":{"title":"Optimizing ITK’s Registration Methods for Multi-processor, Shared-Memory Systems","abstract":"This document describes work-in-progress for refactoring ITK’s registration methods to exploit the parallel, computation power of multi-processor, shared-memory systems. Refactoring includes making the methods multi-threaded as well as optimizing the algorithms. API backward compatibility is being maintained. Helper classes that solve common registration tasks are also being developed.\r\n\r\n\r\nThe refactoring has reduced computation times by factors of 2 to 200 for metrics, interpolators, and transforms computed on multi-processor systems. Extensive sets of tests are being developed to further test operation and backward compatibility.","license":"You are licensing your work to Kitware Inc. under the\nCreative Commons Attribution License Version 3.0.\n\nKitware Inc. agrees to the following:\n\nKitware is free\n * to copy, distribute, display, and perform the work\n * to make derivative works\n * to make commercial use of the work\n\nUnder the following conditions:\n\\\"by Attribution\\\" - Kitware must attribute the work in the manner specified by the author or licensor.\n\n * For any reuse or distribution, they must make clear to others the license terms of this work.\n * Any of these conditions can be waived if they get permission from the copyright holder.\n\nYour fair use and other rights are in no way affected by the above.\n\nThis is a human-readable summary of the Legal Code (the full license) available at\nhttp://creativecommons.org/licenses/by/3.0/legalcode","keywords":["Threaded","Registration","Parallel","ITK"],"authors":[{"name":"Aylward, Stephen","email":"stephen.aylward@kitware.com","affiliations":["Kitware, Inc."],"corresponding":true},{"name":"Jomier, Julien","email":"julien@jomier.com","affiliations":[]},{"name":"Barre, Sebastien","email":"sebastien.barre@kitware.com","affiliations":[]},{"name":"Davis, Brad","email":"brad.davis@kitware.com","affiliations":[]},{"name":"Ibanez, Luis","email":"luis.ibanez@kitware.com","affiliations":[]}],"date_submitted":"2007-07-16T05:46:53Z","external_publication_id":172,"revision_cids":["bafkreibp6x7tg5jypzqgzcq2yu6f6zz5xezozp2ebnf7a6ntjeksszsluy"]},"mdast":{"type":"root"},"downloads":[{"url":"https://ipfs.desci.com/ipfs/bafkreibknnsvqhef5a5mb2pqvptublpjczxapwhcfoyky2vs5233yuyrby","title":"root/reviews.md","filename":"reviews.md","extra":{"size_bytes":25417,"type":"file"}},{"url":"https://ipfs.desci.com/ipfs/bafkreie3534h3qcceom4nctvuxoa7bw4hkmlummsgpfdy5mwc3gyo3panu","title":"root/insight-journal-metadata.json","filename":"insight-journal-metadata.json","extra":{"size_bytes":32954,"type":"file"}},{"url":"https://dweb.link/ipfs/bafkreibpmliz3ubexsmhjvpvxalltg2weoo6ogrjfeivrdlbedkpwevz3e","title":"root/article.pdf","filename":"article.pdf","extra":{"size_bytes":414534,"type":"file"}}],"references":{"cite":{"order":["ref1","ref2","ref3","ref4","ref5","ref6","ref7","ref8","ref9"]},"data":{"ref1":{"label":"ref1","enumerator":"1","url":"https://doi.org/10.1109/n-ssc.2007.4785615","html":"Validity of the single-processor approach to achieving large scale computing capabilities,”+in Proc AFIPS Conf+30+1967+483+485+[Amdahl 1967] G. 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